1. Field of the Invention
The present invention relates generally to the fabrication of semiconductor devices and more particularly to a method of fabricating optically reflective, ohmic contacts on a crystalline semiconductor device.
2. Description of the Prior Art
Forming thin, conductive metal layers on semiconductor substrates is an essential step in the manufacture of microelectronic and opto-electronic devices to provide electrical contacts or current carrying paths to and from the semiconductor material. During manufacture, such thin metal layers, or contacts, are applied to semiconductor substrates, typically silicon, by any one of several well-known deposition techniques, such as vapor deposition, sputtering, or electrolytic precipitation.
It is desirable to create an interface between the semiconductor substrate and the metal layer that has both low resistivity and high optical reflectance. Low resistivity is a primary requirement of any contact on a semiconductor device to reduce the barrier to electron flow between the semiconductor device and the external electronic circuit. It is important, therefore, that the electrical contact be ohmic, even at very high current densities. Newer high efficiency solar cell designs utilize optical confinement techniques to capture and manage incident electromagnetic radiation so that more of it is absorbed in the semiconductor to produce electricity instead of escaping or being absorbed at the contact/crystal interface and dissipated as heat. Optical confinement is facilitated by specularly reflecting interfaces where the contact joins the crystalline material to prevent escape or absorption of the electromagnetic radiation at that interface and reflecting it instead back into the semiconductor for production of electricity. High optical reflectivity, therefore, is important to increase the amount of electromagnetic radiation energy absorbed by the semiconductor material, thereby improving the operation of the semiconductor device by increasing the number of photogenerated electrons available for collection. Unfortunately, it is difficult to provide both of these conditions simultaneously, low resistivity and high optical reflectance, at the semiconductor/metal using conventional methods. An abrupt interface between the semiconductor substrate and the metal produced by conventional methods provides high optical reflection but also creates a high-resistivity ohmic contact. Alternatively, a graded semiconductor-metal interface can provide a low-resistivity ohmic contact but does not provide high optical reflection, since the incident electromagnetic radiation at the interface can propagate into and through the graded interface to the metal and be totally absorbed and dissipated as heat.
While deposition techniques bond the metal layers to the semiconductor substrate, the bond formed by such deposition techniques is usually not sufficient, either mechanically or electrically, to yield reliable, and sometimes even functional, devices. Consequently, the semiconductor must be processed further to improve the bonds between the conductive metal layer and the semiconductor material, for example, by either alloying or sintering the metal layers to the semiconductor surface.
Sintering and alloying are two different processes that are used in semiconductor fabrication and which result in different electrical and mechanical characteristics, such as contact resistance, ohmicity, and bonding. Alloying generally creates a better bond and electrical contact with the semiconductor material because the metal layer and semiconductor material actually melt and meld together. Where semiconductor junctions or other thin film layers are close to the surface, however, such melting for alloying can disrupt or destroy the semiconductor structure or functions. Thus, a slightly lower temperature to produce sintering, which merely breaks down the interface oxide and remains more localized at the interface surfaces, may be more appropriate than alloying in those situations. Also, where there is heavy doping of the silicon, such as near a p-n or n-p junction, electrical contact between the doped silicon and the metal contact is easier to establish. Consequently, sintering, rather than alloying is usually sufficient. Therefore, it has become a general practice in the industry, particularly for solar cells and other opto-electronic devices, to alloy bottom metal contact layers to the bottoms of semiconductor substrates, while the top contacts, which are usually thin strips or grids near the junction, are only sintered to the top surface of the semiconductor material.
In one conventional type of alloying process, metallized semiconductors, i.e., semiconductor substrates with metal contacts deposited thereon, are heated in an alloying furnace to a sufficiently high temperature to melt both the metal and the immediately adjacent substrate material, thereby improving the bond between the two materials and producing the desired electrical and mechanical characteristics. Such furnace alloying is frequently performed at temperatures in excess of 400.degree. C. and for as long as thirty minutes. Exposing the metallized semiconductor to such temperatures in a furnace over such an extended time heats up the entire semiconductor structure uniformly and creates an isothermal condition within the semiconductor. Unfortunately, such heating deep into the semiconductor material tends to produce a detrimental phenomenon known as "spiking." Spiking is caused by the dissolution of certain isolated "weak" pockets in the semiconductor material and subsequent infusion of the metal layer into those dissolved pockets to form metallic intrusions into the surface of the semiconductor material. Spiking can result when the semiconductor and metal device are heated too long or to too high a temperature. Viewed in cross-section, these intrusions of infused metal have an uneven, jagged, or spike-like appearance, thus giving rise to the term "spikes." Depending upon the depth of their penetration, such metal spikes can and often do interfere with various subsurface layers of the semiconductor, including the p-n junction itself, thereby reducing the performance of the semiconductor or even rendering the device inoperative.
Another common problem in conventional furnace alloying processes is the formation of "hillocks" in the metal layer. As the name implies, hillocks are small mounds that form on the surfaces of the metal layer. They are typically about one micrometer in height and may occur in densities of about 10.sup.5 hillocks per square centimeter. Hillocks create reliability problems by interfering with the subsequent laying down of inter-level electric layers or passivating oxide layers. Such hillocks are the result of compression of the metal as it approaches its melting point. The softening of the metal layer allows the compression forces created by thermal expansion to be relieved in the form of hillocks.
Another problem with the furnace alloying process is that the atmosphere around the metallized semiconductor and the entire furnace are heated along with the individual metal layers or contacts and the semiconductor substrate. Not only does this heating of the atmosphere around the semiconductor waste energy, it also encourages degradation of the electrical characteristics of the metal layers due to atmospheric impurities. One form of this degradation is oxidation, which significantly degrades the electrical characteristics of the metal layer. It is well-known that even small traces of oxygen in the atmosphere surrounding the metallized semiconductor can oxidize the metal layer. Consequently, most furnace alloying processes require that the process be performed in a vacuum, or they require the use of a highly purified inert atmosphere, such as argon or helium, to reduce oxidation of the metal layer. Obviously, the creation of such special, purified environments is both time consuming and expensive.
Several techniques have been developed in attempts to solve these problems of spiking, hillocks, and oxidation associated with the conventional furnace alloying process described previously. One such technique involves heating a graphite strip to a high temperature in an inert environment and then placing the heated graphite strip in contact with the metallized semiconductor. The heat from the graphite strip is transferred to the metallized semiconductor, alloying the metal layer to the semiconductor substrate. The primary advantage associated with graphite heating is that it is easier to control the amount of heat absorbed by the metallized semiconductor, thereby reducing the spiking and hillock problems described previously. This process must still be performed under vacuum or in an inert atmosphere, however, to reduce the chances of oxidation. Further, this process only heats the metallized semiconductor from one side, which may lead to spiking or hillock formation.
Another, more popular alloying technique, commonly referred to as optical processing or rapid thermal alloying (RTA), bombards the metallic depositions on the semiconductor from the solid metal bottom side or from all sides, for a few seconds with pulsed, high intensity visible and infrared light, such as light produced by a high intensity CW visual light lamp. This pulsing of the metallized semiconductor with electromagnetic radiation results in a rapid increase in the temperature of the metal layer and the semiconductor substrate, thereby alloying the metal with the semiconductor substrate. U.S. Pat. No. 4,335,362 to Salathe et al., describes a slight variation of this RTA technique wherein narrow regions of the metallic layers are alloyed with the semiconductor by heating the regions with a focused beam from a Nd:YAG (four-level infrared) laser. Other examples of these techniques can be found in U.S. Pat. No. 4,359,486 to Patalong et al., U.S. Pat. No. 4,525,221 to Wu, and U.S. Pat. No. 4,566,177 to van de Ven et al.
Unfortunately, however, RTA suffers some of the same drawbacks as the furnace alloying process. For example, the RTA process usually illuminates a semiconductor device from both the top and bottom sides, the bottom side typically being the solid metal base or contact. Because the metal deposited on the bottom side is reflective, the outside surface of the bottom metal layer reflects a substantial portion of the incoming electromagnetic radiation back to the surrounding atmosphere, heating both the atmosphere and the outer surface of the metal. Of course, heating the outside surface of the metal enough to alloy the inside surface of the metal to the semiconductor substrate only exacerbates the contamination and oxidation problems described previously. Accordingly, the RTA process must also be performed under vacuum or in an inert environment. Even with such special inert environments, oxidation is still so prevalent in RTA that it is common to redeposit a metal layer over the alloyed metal in an attempt to re-gain the electrical integrity of the oxidized metal.
Therefore, while replacement of the furnace alloying process with RTA processes or techniques has reduced the formation of spikes and hillocks, reduced energy requirements to some extent, and increased throughput, such RTA techniques have not completely eliminated the problems associated with the furnace alloying procedures. For example, the RTA processes have not completely eliminated the formation of spikes and hillocks. Consequently, a certain percentage of metallized semiconductors will still have defective metal to semiconductor bonds, reducing the numbers of functional and reliable devices. Furthermore, although the RTA processes described previously reduce the energy requirements over the furnace alloying process, these processes still require relatively large amounts of optical power to heat the metallized semiconductor to a temperature sufficiently high enough to alloy the bottom layer to the semiconductor substrate, since a large portion of the electromagnetic energy is reflected by the outside surface of the bottom layer. Consequently, the RTA processes still heat the surrounding atmosphere and equipment, including the RTA chamber walls to very high temperatures.
Finally, since both RTA and furnace alloying processes heat the surrounding environment as well as the metal and semiconductor, there is a good chance that the metal contacts will be contaminated by residual traces of oxygen in the ambient surroundings.